Fixes [BUGID #716]

Signed-off-by: Saul Wold <sgw@linux.intel.com>

Signed-off-by: Saul Wold <sgw@linux.intel.com>

This layer provides support for Jasper Forest + Ibex Peak Intel
systems. 'Jasper Forest' refers to the Intel Xeon C5500/C3500
processors, which combined with the Intel 3420 PCH chipset (Ibex Peak)
make up the 'Picket Post' CRB this BSP was developed on.

This BSP also makes use of the grub2 and associated live-install
changes in meta-intel/common.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

To match the branch in linux-yocto.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

Update kernel SRCREVs to match linux-yocto.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

This layer provides support for Sandy Bridge + Cougar Point Intel
systems.

The 'Sugar Bay' platform consists of the Intel Sandy Bridge processor,
plus the Cougar Point PCH (Q67 Express or B65 Express chipsets).

This BSP assumes that the Sandy Bridge integrated graphics are being
used, and makes use of the grub2 and associated live-install changes
in meta-intel/common.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

Add a /common dir to contain code shared by multiple BSPs in the
meta-intel repo, along with a couple recipes to live there
temporarily.

In this case, there are two BSPs that need to share the common grub2
and associated initramfs-live-install changes (sugarbay and
jasperforest).

The grub2 and associated initramfs-live-install changes will soon be
submitted to the main poky repo, but for now it makes more sense to
keep them here - they're needed for live-install of the two BSPs
mentioned, but they contain a couple hacks that need to be addressed
and are untested with anything else.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

Fix typo.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

Update both crownbay and crownbay-noemgd kernel SRCREVs to incorporate
latest kernel changes (OHCI USB and AHCI SATA).

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

Upgrade the meta-crownbay BSP to current master.

This updates the layer to reflect the naming changes that took place
between laverne and the current master, and allows the BSP to be built
for master.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

This adds a second machine to the meta-crownbay BSP that uses generic
vesa graphics instead of the Intel-proprietary straight 'crownbay'
version that does.

The name of the new machine is 'crownbay-noemgd'.

Though the graphics quality isn't as nice, the binaries for this
version can be distributed without any need for license click-throughs
or the manual step currently required for the EMGD version.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

Signed-off-by: Saul Wold <sgw@linux.intel.com>

Update crownbay machine and meta SRCREVs to point the correct place in
the kernel tree.

In keeping with the 'self-contained' aspect of the BSP, also keep it
in the meta-crownbay layer.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

This layer provides support for Tunnel Creek + Topcliff Intel systems
to laverne (0.90).

It supports the E6xx embedded on-chip graphics via the Intel Embedded
Media and Graphics Driver (EMGD) 1.5 Gold Driver.

The EMGD and EG20T PCH kernel drivers are of course GPL'ed and are
submitted in a separate patchset for the 2.6.34 yocto kernel.

The userspace X drivers and supporting libraries however are closed
and need to be manually copied into the layer before building.  The
details on how to do this can be found in the README doc in
meta-crownbay/.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

Upgrade the meta-emenlow BSP to current master.

This updates the layer to reflect the naming changes that took place
between laverne and the current master, and allows the BSP to be built
for master.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

This is the meta-emenlow layer, moved from the poky repo in order to
keep all the meta-intel BSPs together.

This version builds against laverne (0.90) - detailed build
instruction can be found in the README file.

Signed-off-by: Tom Zanussi <tom.zanussi@intel.com>

Signed-off-by: Saul Wold <sgw@linux.intel.com>